// generating config files for a physical node
// Created: Apr. 14, 2023 by SUN Yazhou, asia.rabbit@163.com

#include "SC.h"
#include "LN.h"

SC::SC(const YAML::Node &n) : PN(n, CRATE_SC), fTsmData(0), fRcvCmd(0), fTsmSta(0){}
SC::~SC(){}

void SC::Ln(){
  LN *st6 = slave_trigger(6, fn["slave_trigger"].as<string>());
  // status stream //
  LN *ri5 = reduce_index(5, STA), *ts2 = transmit(2, STA);
  *st6 >> *ri5 >> *ts2;
  // cmd stream //
  LN *mi4 = map_index(4, CMD), *rv1 = receive(1, CMD);
  *rv1 >> *mi4 >> *st6;
  // data stream //
  LN *ri3 = reduce_index(3, DATA), *ts0 = transmit(0, DATA);
  *ri3 >> *ts0;
  int i = fLnMap.size();
  for(auto t : fn["dsi"]){
    LN *dsii = dsi(i++, t.as<string>());
    // data-cmd-sta: the order is mandatory
    *dsii >> *ri3; *mi4 >> *dsii; *dsii >> *ri5;
  } // end for over dsi
  // assign interfacing ports //
  fTsmSta = ts2; fRcvCmd = rv1; fTsmData = ts0;
} // end memeber function Ln

// make connections via the 3 streams (DATA, CMD and STA) //
// this -> pn
CMC &SC::operator>>(CMC &c){
  *fTsmData >> *c.receive(c.nl(), DATA) >> *c.RiData(); // data stream
  *c.MiCmd() >> *c.transmit(c.nl(), CMD) >> *fRcvCmd; // cmd stream
  *fTsmSta >> *c.receive(c.nl(), STA) >> *c.RiSta(); // status stream

  return c;
} // end member function operator<<

// the SCM version
SMC &SC::operator>>(SMC &c){
  *fTsmData >> *c.receive(c.nl(), DATA) >> *c.RiData(); // data stream
  *c.MiCmd() >> *c.transmit(c.nl(), CMD) >> *fRcvCmd; // cmd stream
  *fTsmSta >> *c.receive(c.nl(), STA) >> *c.RiSta(); // status stream

  return c;
} // end member function operator<<
